代码拉取完成，页面将自动刷新
# Begin_DVE_Session_Save_Info
# DVE view(Wave.1 ) session
# Saved on Tue Jul 4 10:00:25 2023
# Toplevel windows open: 2
# TopLevel.1
# TopLevel.2
# Wave.1: 288 signals
# End_DVE_Session_Save_Info
# DVE version: O-2018.09-SP2_Full64
# DVE build date: Feb 28 2019 23:39:41
#<Session mode="View" path="/home/ICer/Xuantie/zlsjb100_plus/ascon_aead_v1.0.tcl" type="Debug">
#<Database>
gui_set_time_units 100ps
#</Database>
# DVE View/pane content session:
# Begin_DVE_Session_Save_Info (Wave.1)
# DVE wave signals session
# Saved on Tue Jul 4 10:00:25 2023
# 288 signals
# End_DVE_Session_Save_Info
# DVE version: O-2018.09-SP2_Full64
# DVE build date: Feb 28 2019 23:39:41
#Add ncecessay scopes
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_bmu_top.x_cr_bmu_ibus_if}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top}
gui_load_child_values {wujian100_open_tb}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_iahbl_top.x_cr_ahbl_req_arb}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_if}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_tee_core_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_tee_core_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_branch}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_bmu_top.x_cr_bmu_dbus_if}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp}
gui_load_child_values {wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_cp0_top.x_cr_cp0_oreg}
gui_set_time_units 100ps
set _wave_session_group_21 Group5
if {[gui_sg_is_group -name "$_wave_session_group_21"]} {
set _wave_session_group_21 [gui_sg_generate_new_name]
}
set Group1 "$_wave_session_group_21"
gui_sg_addsignal -group "$_wave_session_group_21" { {Sim:wujian100_open_tb.PI_SOC_CLK} {Sim:wujian100_open_tb.PI_MCURST} }
set _wave_session_group_22 $_wave_session_group_21|
append _wave_session_group_22 tee_bus
set Group5|tee_bus "$_wave_session_group_22"
gui_sg_addsignal -group "$_wave_session_group_22" { }
gui_sg_move "$_wave_session_group_22" -after "$_wave_session_group_21" -pos 2
set _wave_session_group_23 $_wave_session_group_22|
append _wave_session_group_23 tee_core_addr_ahb_bus_m0
set Group5|tee_bus|tee_core_addr_ahb_bus_m0 "$_wave_session_group_23"
gui_sg_addsignal -group "$_wave_session_group_23" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hprot_tmp} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m0_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m0_hgrant} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m0_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m0_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m0_hresp} }
set _wave_session_group_24 $_wave_session_group_22|
append _wave_session_group_24 tee_core_sys_ahb_bus_m2
set Group5|tee_bus|tee_core_sys_ahb_bus_m2 "$_wave_session_group_24"
gui_sg_addsignal -group "$_wave_session_group_24" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_tee_core_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.pcgen_xx_cur_pc} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_tee_core_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_cur_pc_next_val} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hprot_tmp} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.cpu_hmain1_m2_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m2_hgrant} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m2_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m2_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_cpu_m2_hresp} }
gui_sg_move "$_wave_session_group_24" -after "$_wave_session_group_22" -pos 1
set _wave_session_group_25 $_wave_session_group_22|
append _wave_session_group_25 tee_bus_s10
set Group5|tee_bus|tee_bus_s10 "$_wave_session_group_25"
gui_sg_addsignal -group "$_wave_session_group_25" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ree_bus_s10_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ree_bus_hmain1_s10_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ree_bus_hmain1_s10_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ree_bus_hmain1_s10_hresp} }
gui_sg_move "$_wave_session_group_25" -after "$_wave_session_group_22" -pos 2
set _wave_session_group_26 $_wave_session_group_22|
append _wave_session_group_26 tee_isram_bus_s0
set Group5|tee_bus|tee_isram_bus_s0 "$_wave_session_group_26"
gui_sg_addsignal -group "$_wave_session_group_26" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ismc_hmain1_s0_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ismc_hmain1_s0_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.ismc_hmain1_s0_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_ismc_s0_hburst} }
gui_sg_move "$_wave_session_group_26" -after "$_wave_session_group_22" -pos 3
set _wave_session_group_27 $_wave_session_group_22|
append _wave_session_group_27 tee_dsram0_bus_s2
set Group5|tee_bus|tee_dsram0_bus_s2 "$_wave_session_group_27"
gui_sg_addsignal -group "$_wave_session_group_27" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s2_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s2_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s2_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s2_hburst} }
gui_sg_move "$_wave_session_group_27" -after "$_wave_session_group_22" -pos 4
set _wave_session_group_28 $_wave_session_group_22|
append _wave_session_group_28 tee_dsram1_bus_s3
set Group5|tee_bus|tee_dsram1_bus_s3 "$_wave_session_group_28"
gui_sg_addsignal -group "$_wave_session_group_28" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s3_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s3_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.smc_hmain1_s3_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.hmain1_smc_s3_hburst} }
gui_sg_move "$_wave_session_group_28" -after "$_wave_session_group_22" -pos 5
set _wave_session_group_29 $_wave_session_group_21|
append _wave_session_group_29 ree_bus
set Group5|ree_bus "$_wave_session_group_29"
gui_sg_addsignal -group "$_wave_session_group_29" { }
gui_sg_move "$_wave_session_group_29" -after "$_wave_session_group_21" -pos 3
set _wave_session_group_30 $_wave_session_group_29|
append _wave_session_group_30 cr_bmu_ibus_if
set Group5|ree_bus|cr_bmu_ibus_if "$_wave_session_group_30"
gui_sg_addsignal -group "$_wave_session_group_30" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_bmu_top.x_cr_bmu_ibus_if.iahbl_hit} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.ifu_bmu_req} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_bmu_top.x_cr_bmu_ibus_if.iahbl_hit_ff} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_iahbl_top.x_cr_ahbl_req_arb.dbus_req_without_deny_chk_fail_cmplt} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_iahbl_top.x_cr_ahbl_req_arb.ibus_req_without_deny} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_iahbl_top.x_cr_ahbl_req_arb.had_req_without_cmplt} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_iahbl_top.x_cr_ahbl_req_arb.cpu_req_grnt} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.addr_cnt_high_upd_en} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.iu_ifu_inst_fetch_for_data} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.iu_ifu_data_fetch_for_data} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.ibus_nonseq_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_add} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_reg} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_inc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_cur} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.addr_cnt} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.cpurst_b} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.addr_cnt_low_upd_clk} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.addr_cnt_high_upd_clk} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.biu_pad_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_if.cpu_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.dbus_sel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.ibus_sel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.had_sel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.bmu_ahbl_dbus_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.bmu_ahbl_ibus_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_sahbl_top.x_cr_ahbl_req_arb.bmu_ahbl_had_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_bmu_top.x_cr_bmu_dbus_if.lsu_bmu_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_addr_post} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_addr_1_0} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_iu_adder_src0} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_iu_adder_src1} }
gui_sg_addsignal -group "$_wave_session_group_30" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_base} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_iu_adder_src0} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_base} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_iu_adder_src1} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.iu_lsu_cmp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_lsu_top.x_cr_lsu_dp.lsu_offset} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_branch.iu_lsu_cmp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_branch.ctrl_branch_ex_data_sel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_branch.branch_br_cmp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.init_ree_ifu_pc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.inc_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_ifu_top.x_ibusif.ibus_seq_addr} }
set _wave_session_group_31 $_wave_session_group_29|
append _wave_session_group_31 ree_core_addr_ahb_bus_m0
set Group5|ree_bus|ree_core_addr_ahb_bus_m0 "$_wave_session_group_31"
gui_sg_addsignal -group "$_wave_session_group_31" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m0_hgrant} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m0_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m0_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m0_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m0_hresp} }
gui_sg_move "$_wave_session_group_31" -after "$_wave_session_group_29" -pos 1
set _wave_session_group_32 $_wave_session_group_29|
append _wave_session_group_32 ree_core_sys_ahb_bus_m2
set Group5|ree_bus|ree_core_sys_ahb_bus_m2 "$_wave_session_group_32"
gui_sg_addsignal -group "$_wave_session_group_32" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.pcgen_xx_cur_pc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_cur_pc_next_val} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_cp0_top.x_cr_cp0_oreg.nt_base} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_cp0_top.x_cr_cp0_oreg.nt_mepc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_cp0_top.x_cr_cp0_oreg.oreg_clk} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_addr_chgflw_delay} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_cur_pc_next_val_before_hs} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_addr_except_chgflw_delay} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_cur_pc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_addr_after_bctm} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_addr_chgflw_asap} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_had} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_vec} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_ibus} {Sim:wujian100_open_tb.x_wujian100_open_top.x_cpu_top.CPU.x_cr_core_top.x_cr_core.x_cr_iu_top.x_cr_iu_pcgen.pcgen_address_epc} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m2_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m2_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m2_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.cpu_hmain0_m2_hprot_tmp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_cpu_m2_hgrant} }
gui_sg_move "$_wave_session_group_32" -after "$_wave_session_group_29" -pos 2
set _wave_session_group_33 $_wave_session_group_29|
append _wave_session_group_33 ree_bus_m4
set Group5|ree_bus|ree_bus_m4 "$_wave_session_group_33"
gui_sg_addsignal -group "$_wave_session_group_33" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_mdummy0_m4_hgrant} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_mdummy0_m4_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_mdummy0_m4_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.mdummy0_hmain0_m4_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_mdummy0_m4_hresp} }
gui_sg_move "$_wave_session_group_33" -after "$_wave_session_group_29" -pos 3
set _wave_session_group_34 $_wave_session_group_29|
append _wave_session_group_34 rbm_a_s1
set Group5|ree_bus|rbm_a_s1 "$_wave_session_group_34"
gui_sg_addsignal -group "$_wave_session_group_34" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_imemdummy0_s1_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.imemdummy0_hmain0_s1_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.imemdummy0_hmain0_s1_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.imemdummy0_hmain0_s1_hresp} }
gui_sg_move "$_wave_session_group_34" -after "$_wave_session_group_29" -pos 4
set _wave_session_group_35 $_wave_session_group_29|
append _wave_session_group_35 rbm_b_s5
set Group5|ree_bus|rbm_b_s5 "$_wave_session_group_35"
gui_sg_addsignal -group "$_wave_session_group_35" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dmemdummy0_hmain0_s5_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dmemdummy0_hmain0_s5_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dmemdummy0_hmain0_s5_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dmemdummy0_s5_hwrite} }
gui_sg_move "$_wave_session_group_35" -after "$_wave_session_group_29" -pos 5
set _wave_session_group_36 $_wave_session_group_29|
append _wave_session_group_36 ree_bus_s10
set Group5|ree_bus|ree_bus_s10 "$_wave_session_group_36"
gui_sg_addsignal -group "$_wave_session_group_36" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.lsbus_hmain0_s10_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.lsbus_hmain0_s10_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_lsbus_s10_hwrite} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.lsbus_hmain0_s10_hresp} }
gui_sg_move "$_wave_session_group_36" -after "$_wave_session_group_29" -pos 6
set _wave_session_group_37 $_wave_session_group_29|
append _wave_session_group_37 ree2tee_mailbox_s7
set Group5|ree_bus|ree2tee_mailbox_s7 "$_wave_session_group_37"
gui_sg_addsignal -group "$_wave_session_group_37" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dummy0_hmain0_s7_hrdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dummy0_hmain0_s7_hready} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.dummy0_hmain0_s7_hresp} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_haddr} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hburst} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hprot} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hsel} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hsize} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_htrans} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hwdata} {Sim:wujian100_open_tb.x_wujian100_open_top.x_pdu_top.x_main_bus_top.hmain0_dummy0_s7_hwrite} }
gui_sg_move "$_wave_session_group_37" -after "$_wave_session_group_29" -pos 7
set _wave_session_group_38 apb_bus
if {[gui_sg_is_group -name "$_wave_session_group_38"]} {
set _wave_session_group_38 [gui_sg_generate_new_name]
}
set Group2 "$_wave_session_group_38"
gui_sg_addsignal -group "$_wave_session_group_38" { }
set _wave_session_group_39 $_wave_session_group_38|
append _wave_session_group_39 pmu
set apb_bus|pmu "$_wave_session_group_39"
gui_sg_addsignal -group "$_wave_session_group_39" { {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_clk_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_rst_n_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_paddr_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_pprot_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_psel_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_pen_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_pwdata_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_pwrite_i} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_prdata_o} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_t2r_intr_o} {Sim:wujian100_open_tb.x_wujian100_open_top.x_aou_top.x_pmu_top.u_tm_apb_if.tai_init_ree_ifu_pc_addr_o} }
set _wave_session_group_40 ascon_aead_top
if {[gui_sg_is_group -name "$_wave_session_group_40"]} {
set _wave_session_group_40 [gui_sg_generate_new_name]
}
set Group3 "$_wave_session_group_40"
gui_sg_addsignal -group "$_wave_session_group_40" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ascon_aead_clk_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ascon_aead_rst_n_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.haddr_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hprot_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hsel_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hsize_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.htrans_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hwdata_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hwrite_i} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hrdata_o} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hready_o} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.hresp_o} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.intr_o} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2tx_buf_raddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.tx_buf2if_rdat} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2rx_buf_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2rx_buf_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2rx_buf_waddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2rx_buf_wdat} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2ctrl_regs_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2ctrl_regs_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2ctrl_regs_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.if2ctrl_regs_wdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2if_rdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_prot} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_fsm_sta_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_fsm_en_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_w_t_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_w_sta} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ctrl_regs_w_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fin2ctrl_regs_w_t} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_msg_block_num} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_msg_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_aead_ctrl_sta} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_aead_ctrl_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_aead_ctrl_mode} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2fsm_aead_c_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2ad_aead_a} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2init2fin_aead_k} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ctrl_regs2init_aead_n} }
gui_sg_addsignal -group "$_wave_session_group_40" { {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2tx_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2tx_wen} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2tx_addr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.pt2tx_wdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2rx_buf_raddr} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.rx_buf2pt_rdata} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.init2fsm_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2init_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2init_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2init_mode} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ad2fsm_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ad_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ad_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2ad_mode} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.pt2fsm_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2pt_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2pt_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2pt_mode} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2pt_first} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2pt_last} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.final2fsm_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2final_vld} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2final_en} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2final_mode} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.init2ad_s} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.ad2pt_s} {Sim:wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.pt2fin_s} }
if {![info exists useOldWindow]} {
set useOldWindow true
}
if {$useOldWindow && [string first "Wave" [gui_get_current_window -view]]==0} {
set Wave.1 [gui_get_current_window -view]
} else {
set Wave.1 [lindex [gui_get_window_ids -type Wave] 0]
if {[string first "Wave" ${Wave.1}]!=0} {
gui_open_window Wave
set Wave.1 [ gui_get_current_window -view ]
}
}
set groupExD [gui_get_pref_value -category Wave -key exclusiveSG]
gui_set_pref_value -category Wave -key exclusiveSG -value {false}
set origWaveHeight [gui_get_pref_value -category Wave -key waveRowHeight]
gui_list_set_height -id Wave -height 25
set origGroupCreationState [gui_list_create_group_when_add -wave]
gui_list_create_group_when_add -wave -disable
gui_marker_set_ref -id ${Wave.1} C1
gui_wv_zoom_timerange -id ${Wave.1} 38014634 38140390
gui_list_add_group -id ${Wave.1} -after {New Group} [list ${Group1}]
gui_list_add_group -id ${Wave.1} -after wujian100_open_tb.PI_MCURST [list ${Group5|tee_bus}]
gui_list_add_group -id ${Wave.1} -after ${Group5|tee_bus} [list ${Group5|tee_bus|tee_core_addr_ahb_bus_m0}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus|tee_core_addr_ahb_bus_m0 [list ${Group5|tee_bus|tee_core_sys_ahb_bus_m2}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus|tee_core_sys_ahb_bus_m2 [list ${Group5|tee_bus|tee_bus_s10}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus|tee_bus_s10 [list ${Group5|tee_bus|tee_isram_bus_s0}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus|tee_isram_bus_s0 [list ${Group5|tee_bus|tee_dsram0_bus_s2}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus|tee_dsram0_bus_s2 [list ${Group5|tee_bus|tee_dsram1_bus_s3}]
gui_list_add_group -id ${Wave.1} -after Group5|tee_bus [list ${Group5|ree_bus}]
gui_list_add_group -id ${Wave.1} -after ${Group5|ree_bus} [list ${Group5|ree_bus|cr_bmu_ibus_if}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|cr_bmu_ibus_if [list ${Group5|ree_bus|ree_core_addr_ahb_bus_m0}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|ree_core_addr_ahb_bus_m0 [list ${Group5|ree_bus|ree_core_sys_ahb_bus_m2}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|ree_core_sys_ahb_bus_m2 [list ${Group5|ree_bus|ree_bus_m4}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|ree_bus_m4 [list ${Group5|ree_bus|rbm_a_s1}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|rbm_a_s1 [list ${Group5|ree_bus|rbm_b_s5}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|rbm_b_s5 [list ${Group5|ree_bus|ree_bus_s10}]
gui_list_add_group -id ${Wave.1} -after Group5|ree_bus|ree_bus_s10 [list ${Group5|ree_bus|ree2tee_mailbox_s7}]
gui_list_add_group -id ${Wave.1} -after {New Group} [list ${Group2}]
gui_list_add_group -id ${Wave.1} -after ${Group2} [list ${apb_bus|pmu}]
gui_list_add_group -id ${Wave.1} -after {New Group} [list ${Group3}]
gui_list_collapse -id ${Wave.1} ${Group1}
gui_list_collapse -id ${Wave.1} ${Group2}
gui_list_select -id ${Wave.1} {wujian100_open_tb.x_wujian100_open_top.u_is_top.u_is_bus_top.u_ascon_aead_top.fsm2final_vld }
gui_seek_criteria -id ${Wave.1} {Any Edge}
gui_set_pref_value -category Wave -key exclusiveSG -value $groupExD
gui_list_set_height -id Wave -height $origWaveHeight
if {$origGroupCreationState} {
gui_list_create_group_when_add -wave -enable
}
if { $groupExD } {
gui_msg_report -code DVWW028
}
gui_list_set_filter -id ${Wave.1} -list { {Buffer 1} {Input 1} {Others 1} {Linkage 1} {Output 1} {Parameter 1} {All 1} {Aggregate 1} {LibBaseMember 1} {Event 1} {Assertion 1} {Constant 1} {Interface 1} {BaseMembers 1} {Signal 1} {$unit 1} {Inout 1} {Variable 1} }
gui_list_set_filter -id ${Wave.1} -text {*}
gui_list_set_insertion_bar -id ${Wave.1} -group ${Group3} -position in
gui_marker_move -id ${Wave.1} {C1} 38099250
gui_view_scroll -id ${Wave.1} -vertical -set 631
gui_show_grid -id ${Wave.1} -enable false
#</Session>
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